1. Field of the Invention
This invention relates in general to semiconductor structures and in particular to isolation trenches for a semiconductor structures.
2. Description of the Related Art
Isolation trenches are utilized for isolating active regions of an integrated cirucuit. For example, isolation trenches are utlized to isolate active regions of a semiconductor on insulator (SOI) wafer where the isolation trench exends to the underlying insulator. With such configurations, the trench is cut to the insulator and the silicon sidewalls of the active layer are oxidized to round the corners of the trench. Afterwards, the trench is filled with a dielectric material. One problem is that subsequent thermal processes which can oxidize silicon may cause a birds beak of oxide to extend under the bottom of the active layer from the trench base.
FIG. 1 shows a partial cross section of a prior art wafer. Wafer 101 has a SOI configuration with an active silicon layer 107 located over insulator 105, which is located on a semiconductor substrate 103. Located at the bottom of isolation trench 109 is a “passivating” layer 111 of silicon nitride. An oxide 113 is subsequently formed on layer 111 in trench 109. Layer 111 prevents the formation of a birds beak of oxide into layer 107 at the bottom of trench 109 during subsequent thermal processes.
One problem with the configuration of FIG. 1 is that during subsequent oxide etchings, trench fill material 113 may removed in the trench beyond a desire depth. Such a condition may cause a short between subsequently formed gates of active regions isolated by the trench due to e.g. poly silicon stringers. Also, variation in trench depth removal may cause variations in transitor operation due to a varying effective width of the transitor from the gate extending into the channel.
Layer 111 may be made thicker to reduce the depth of oxide 113 in trench 109. However, increasing the thickness of nitride layer 111 may not be manufacurably feasible due to e.g. “breadloafing” of the nitride over the trench during deposition of the material of layer 111. Another problem with increasing the thickness of nitride layer 111 is that because the nitride has a higher dielectric constant, parasitic capactiance between active regions of layer 107 may be increased due to the higher dielectric constant of the nitride.
What is needed is an improved configuration of an isolation trench.
The use of the same reference symbols in different drawings indicates identical items unless otherwise noted. The Figures are not necessarily drawn to scale.